TP-Thread
汇编文件的 包含路径 要单独加上，打开 构建配置->汇编器->附加选项
使用 -I 选项
E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\bin>iasmarm
IAR Assembler V8.32.3.193/W32 for ARM
Copyright 1999-2019 IAR Systems AB.
Usage: iasmarm {
<options>} <sourcefile> {
<options>}
Sourcefile: source file with default extension: .msa, , .asm, or .s
Environment: IASMARM
Options (specified order is of no importance):
-B Print debug info for assembler macros
-c{
DEAOM} Listing options
D: Disable listing, E: Disable macro expansion
A: List only assembled part O: List several lines of code
M: List Macro definition
-DSYMB Equivalent to: #define SYMB 1
-DSYMB=xx Equivalent to: #define SYMB xx
-e Use big-endian byte order
-Enumber Allow <number> errors
-f file Extend command line with <file> <.xcl>
-g No system include
-G Open standard input as source
-i List #included files
-Ipath Add #include search path
-j Enable alternative register names, operators and mnemonics
-l file Generate a list on: <file> <.lst>
-Lpath Generate a list on: <path> \ <source> <.lst>
-Mab Change asm.macro argument quote chars,
where a is start-of-quote and b is end-of-quote char.
default is a == < and b == >.
-N No header in listing
-o file Put object on: <file> <.o>
-Opath Put object on: <path> \ <source> <.o>
-pnn Page listing with 'nn' lines/page (10-150)
-r Enable debugger output in object
-S Silent operation of assembler
-s{
+|-} Set case sensitivity for user symbols
-s and -s+ enables sensitivity, -s- disables it.
-tn Set tab spacing between 2 and 9 (default 8)
-USYMB Equivalent to: #undef SYMB
-ws To make warnings generate exit code 1
-wstring Disable warnings
string: <+|-,><+|-range><,+|-range>...
range: low_warning_nr<-high_warning_nr>
example: -w turns all warnings off
-w-,+10-12,+20 turns all but 10,11,12 and 20 off
-x{
DI2} Generate cross-reference list
D: Show all #defines, I: Show Internal table
2: Dual line space listing
--aarch64 Generate code for AArch64, same as --cpu_mode A64
--abi {
lp64|ilp32}
Specify ABI for AArch64: ilp32 or lp64.
--arm Generate code in arm mode, same as --cpu_mode arm
--cmse
Target secure mode in CMSE (ARMv8-M security extensions)
--cpu core Specify target core
Valid options are core names such as Cortex-M3
and architecture names such as 7M
Default is Cortex-M3
--cpu_mode {
arm|a|thumb|t}
Select default mode for CODE directive, ARM is default
--endian {
little|l|big|b}
Specify target byte order
--fpu {
VFPv1|VFPv2|VFPv3{
_D16}{
_FP16}|VFP9-S|none}
Specify target FPU coprocessor support
Default is none, which selects the software
floating-point library.
--legacy {
legacyOption}
Generate object files compatible with
older toolchains. Valid options are:
RVCT3.0
--no_dwarf3_cfi
Suppress Dwarf 3 Call Frame Information instructions
--no_it_verification
Do not verify that the instructions following
an IT instruction has the correct condition set
--no_literal_pool
Use MOV32 for LDR Rd,=expr (requires ARMv7-M)
--no_path_in_file_macros
Strip path from __FILE__ macros
--source_encoding {
locale|utf8}
Encoding to use for source files with no BOM
--suppress_vfe_header
Do not generate VFE header info
--system_include_directory <path>
Set system header directory
--thumb Generate code in thumb mode, same as --cpu_mode thumb
--version Output version info and exit
